-- Version 0.2 -- P J Dickinson, 30-08-95 entity ST20450A is generic (PHYSICAL_PIN_MAP : string := "PQFP208"); port (VDD: linkage bit_vector (0 to 29); GND: linkage bit_vector (0 to 31); spare: linkage bit_vector (0 to 3); ClockIn, LinkClockIn, LPClockIn: in bit; LPClockOsc: linkage bit; -- this inout is a clock, and therefore has no BS cell LPIn: in bit; LPOut, ProcClkOut: out bit; ProcSpeed: in bit_vector (0 to 2); ResetRespOut: out bit; notRST, CPUReset, CPUAnalyse: in bit; ErrorOut: out bit; ErrorIn: in bit; DebugOut: out bit_vector (0 to 7); DebugIn: in bit; Interrupt: in bit_vector (0 to 7); MemAddr: out bit_vector (2 to 31); MemData: inout bit_vector (0 to 31); notMemRd: out bit; MemReq: in bit; MemGranted, MemRefPend, notMemRf: out bit; MemWait: in bit; notMemCAS, notMemRAS, notMemPS, notMemBE: out bit_vector (0 to 3); BootSrce: in bit_vector (0 to 1); DisableRAM: in bit; LinkIn: in bit_vector (0 to 3); LinkOut: out bit_vector (0 to 3); Link0Special: in bit; LinkSpeed: in bit_vector (0 to 1); EventReq: in bit; EventAck: out bit; EventWaiting: linkage bit; -- This output has no BS cell due to a bug TDI: in bit; TDO: out bit; TMS, TCK, notTRST: in bit; MirrorADDEMI: in bit ); use STD_1149_1_1990.all; attribute PIN_MAP of ST20450A : entity is PHYSICAL_PIN_MAP; constant PQFP208: PIN_MAP_STRING := "memaddr:(3,4,5,8,9,10,13,14,15,18,19,20,23,24,25,29,30,31,34,35,36,39,40,41,44,45,46,49,50,51)," & "memdata:(54,55,56,57,59,60,61,62,64,65,66,67,69,70,71,72,74,75,76,77,80,81,82,83,85,86,87,88,90,91,92,93)," & "debugout:(95,96,97,98,100,101,102,103)," & "debugin:106," & "errorin:107," & "errorout:108," & "notrst:109," & "resetrespout:111," & "cpuanalyse:112," & "cpureset:113," & "bootsrce:(114,116)," & "tdi:117," & "tms:118," & "tck:119," & "nottrst:121," & "tdo:122," & "interrupt:(123,124,126,127,128,129,132,133)," & "lpclockosc:137," & "lpclockin:138," & "lpin:139," & "lpout:140," & "procspeed:(142,143,144)," & "clockin:145," & "linkclockin:147," & "linkspeed:(148,149)," & "link0special:150," & "eventreq:152," & "eventack:153," & "eventwaiting:154," & "linkin:(158,160,163,165)," & "linkout:(159,161,164,166)," & "mirroraddemi:169," & "disableram:170," & "notmemrd:171," & "memreq:173," & "memgranted:174," & "memrefpend:175," & "memwait:176," & "notmemrf:178," & "procclkout:180," & "notmembe:(184,185,186,187)," & "notmemps:(190,191,192,195)," & "notmemcas:(196,197,200,201)," & "notmemras:(202,205,206,207)," & "vdd:(11,17,21,27,28,33,37,43,47,53,63,73,79,89,99,105,115,125,131,141,151,157,167,177,179,183,189,193,199,203)," & "gnd:(2,6,12,16,22,26,32,38,42,48,52,58,68,78,84,94,104,110,120,130,136,146,156,162,172,181,182,188,194,198,204,208)," & "spare:(134,135,155,168)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_RESET of notTRST: signal is true; attribute INSTRUCTION_LENGTH of ST20450A : entity is 5; attribute INSTRUCTION_OPCODE of ST20450A : entity is "BYPASS (11111), " & "EXTEST (00000), " & "IDCODE (00001), " & "SAMPLE (00010) " ; attribute INSTRUCTION_CAPTURE of ST20450A : entity is "00001"; attribute IDCODE_REGISTER of ST20450A : entity is "00000101000000000000000000010001"; attribute BOUNDARY_LENGTH of ST20450A : entity is 181; attribute BOUNDARY_REGISTER of ST20450A : entity is -- num cell port function safe [ccell disval rslt] " 0 (BC_1, notmemras(3) , output2, X)," & " 1 (BC_1, notmemras(2) , output2, X)," & " 2 (BC_1, notmemras(1) , output2, X)," & " 3 (BC_1, notmemras(0) , output2, X)," & " 4 (BC_1, notmemcas(3) , output2, X)," & " 5 (BC_1, notmemcas(2) , output2, X)," & " 6 (BC_1, notmemcas(1) , output2, X)," & " 7 (BC_1, notmemcas(0) , output2, X)," & " 8 (BC_1, notmemps(3) , output2, X)," & " 9 (BC_1, notmemps(2) , output2, X)," & " 10 (BC_1, notmemps(1) , output2, X)," & " 11 (BC_1, notmemps(0) , output2, X)," & " 12 (BC_1, notmembe(3) , output2, X)," & " 13 (BC_1, notmembe(2) , output2, X)," & " 14 (BC_1, notmembe(1) , output2, X)," & " 15 (BC_1, notmembe(0) , output2, X)," & " 16 (BC_1, procclkout , output2, X)," & " 17 (BC_1, * , internal, X)," & " 18 (BC_1, notmemrf , output2, X)," & " 19 (BC_1, memwait , input, X)," & " 20 (BC_1, * , internal, X)," & " 21 (BC_1, * , internal, X)," & " 22 (BC_1, memrefpend , output2, X)," & " 23 (BC_1, * , internal, X)," & " 24 (BC_1, memgranted , output2, X)," & " 25 (BC_1, memreq , input, X)," & " 26 (BC_1, * , internal, X)," & " 27 (BC_1, * , internal, X)," & " 28 (BC_1, notmemrd , output2, X)," & " 29 (BC_1, disableram , input, X)," & " 30 (BC_1, * , internal, X)," & " 31 (BC_1, mirroraddemi , input, X)," & " 32 (BC_1, * , internal, X)," & " 33 (BC_1, linkout(3) , output2, X)," & " 34 (BC_1, linkin (3) , input, X)," & " 35 (BC_1, linkout(2) , output2, X)," & " 36 (BC_1, linkin (2) , input, X)," & " 37 (BC_1, linkout(1) , output2, X)," & " 38 (BC_1, linkin (1) , input, X)," & " 39 (BC_1, linkout(0) , output2, X)," & " 40 (BC_1, linkin (0) , input, X)," & -- " (BC_1, eventwaiting , output2, X)," & -- no BS cell here due to bug " 41 (BC_1, eventack , output2, X)," & " 42 (BC_1, eventreq , input, X)," & " 43 (BC_1, link0special , input, X)," & " 44 (BC_1, linkspeed(1) , input, X)," & " 45 (BC_1, linkspeed(0) , input, X)," & " 46 (BC_1, linkclockin , input, X)," & " 47 (BC_1, clockin , input, X)," & " 48 (BC_1, procspeed(2) , input, X)," & " 49 (BC_1, procspeed(1) , input, X)," & " 50 (BC_1, procspeed(0) , input, X)," & " 51 (BC_1, lpout , output2, X)," & " 52 (BC_1, lpin , input, X)," & " 53 (BC_1, lpclockin , input, X)," & " 54 (BC_1, interrupt(7) , input, X)," & " 55 (BC_1, interrupt(6) , input, X)," & " 56 (BC_1, interrupt(5) , input, X)," & " 57 (BC_1, interrupt(4) , input, X)," & " 58 (BC_1, interrupt(3) , input, X)," & " 59 (BC_1, interrupt(2) , input, X)," & " 60 (BC_1, interrupt(1) , input, X)," & " 61 (BC_1, interrupt(0) , input, X)," & " 62 (BC_1, bootsrce(0) , input, X)," & " 63 (BC_1, bootsrce(1) , input, X)," & " 64 (BC_1, cpureset , input, X)," & " 65 (BC_1, cpuanalyse , input, X)," & " 66 (BC_1, resetrespout , output2, X)," & " 67 (BC_1, notrst , input, X)," & " 68 (BC_1, errorout , output2, X)," & " 69 (BC_1, errorin , input, X)," & " 70 (BC_1, debugin , input, X)," & " 71 (BC_1, debugout(7) , output2, X)," & " 72 (BC_1, debugout(6) , output2, X)," & " 73 (BC_1, debugout(5) , output2, X)," & " 74 (BC_1, debugout(4) , output2, X)," & " 75 (BC_1, debugout(3) , output2, X)," & " 76 (BC_1, debugout(2) , output2, X)," & " 77 (BC_1, debugout(1) , output2, X)," & " 78 (BC_1, debugout(0) , output2, X)," & " 79 (BC_1, memdata( 0) , input, X)," & " 80 (BC_1, memdata( 0) , output3, X, 87, 0, Z)," & " 81 (BC_1, memdata( 1) , input, X)," & " 82 (BC_1, memdata( 1) , output3, X, 87, 0, Z)," & " 83 (BC_1, memdata( 2) , input, X)," & " 84 (BC_1, memdata( 2) , output3, X, 87, 0, Z)," & " 85 (BC_1, memdata( 3) , input, X)," & " 86 (BC_1, memdata( 3) , output3, X, 87, 0, Z)," & " 87 (BC_1, * , control, 0)," & -- mdata 0-7 " 88 (BC_1, memdata( 4) , input, X)," & " 89 (BC_1, memdata( 4) , output3, X, 87, 0, Z)," & " 90 (BC_1, memdata( 5) , input, X)," & " 91 (BC_1, memdata( 5) , output3, X, 87, 0, Z)," & " 92 (BC_1, memdata( 6) , input, X)," & " 93 (BC_1, memdata( 6) , output3, X, 87, 0, Z)," & " 94 (BC_1, memdata( 7) , input, X)," & " 95 (BC_1, memdata( 7) , output3, X, 87, 0, Z)," & " 96 (BC_1, memdata( 8) , input, X)," & " 97 (BC_1, memdata( 8) , output3, X, 104, 0, Z)," & " 98 (BC_1, memdata( 9) , input, X)," & " 99 (BC_1, memdata( 9) , output3, X, 104, 0, Z)," & " 100 (BC_1, memdata(10) , input, X)," & " 101 (BC_1, memdata(10) , output3, X, 104, 0, Z)," & " 102 (BC_1, memdata(11) , input, X)," & " 103 (BC_1, memdata(11) , output3, X, 104, 0, Z)," & " 104 (BC_1, * , control, 0)," & -- mdata 8-15 " 105 (BC_1, memdata(12) , input, X)," & " 106 (BC_1, memdata(12) , output3, X, 104, 0, Z)," & " 107 (BC_1, memdata(13) , input, X)," & " 108 (BC_1, memdata(13) , output3, X, 104, 0, Z)," & " 109 (BC_1, memdata(14) , input, X)," & " 110 (BC_1, memdata(14) , output3, X, 104, 0, Z)," & " 111 (BC_1, memdata(15) , input, X)," & " 112 (BC_1, memdata(15) , output3, X, 104, 0, Z)," & " 113 (BC_1, * , control, 0)," & -- mdata 16-23 " 114 (BC_1, memdata(16) , input, X)," & " 115 (BC_1, memdata(16) , output3, X, 113, 0, Z)," & " 116 (BC_1, memdata(17) , input, X)," & " 117 (BC_1, memdata(17) , output3, X, 113, 0, Z)," & " 118 (BC_1, memdata(18) , input, X)," & " 119 (BC_1, memdata(18) , output3, X, 113, 0, Z)," & " 120 (BC_1, memdata(19) , input, X)," & " 121 (BC_1, memdata(19) , output3, X, 113, 0, Z)," & " 122 (BC_1, memdata(20) , input, X)," & " 123 (BC_1, memdata(20) , output3, X, 113, 0, Z)," & " 124 (BC_1, memdata(21) , input, X)," & " 125 (BC_1, memdata(21) , output3, X, 113, 0, Z)," & " 126 (BC_1, memdata(22) , input, X)," & " 127 (BC_1, memdata(22) , output3, X, 113, 0, Z)," & " 128 (BC_1, memdata(23) , input, X)," & " 129 (BC_1, memdata(23) , output3, X, 113, 0, Z)," & " 130 (BC_1, * , control, 0)," & -- mdata 24-31 " 131 (BC_1, memdata(24) , input, X)," & " 132 (BC_1, memdata(24) , output3, X, 130, 0, Z)," & " 133 (BC_1, memdata(25) , input, X)," & " 134 (BC_1, memdata(25) , output3, X, 130, 0, Z)," & " 135 (BC_1, memdata(26) , input, X)," & " 136 (BC_1, memdata(26) , output3, X, 130, 0, Z)," & " 137 (BC_1, memdata(27) , input, X)," & " 138 (BC_1, memdata(27) , output3, X, 130, 0, Z)," & " 139 (BC_1, memdata(28) , input, X)," & " 140 (BC_1, memdata(28) , output3, X, 130, 0, Z)," & " 141 (BC_1, memdata(29) , input, X)," & " 142 (BC_1, memdata(29) , output3, X, 130, 0, Z)," & " 143 (BC_1, memdata(30) , input, X)," & " 144 (BC_1, memdata(30) , output3, X, 130, 0, Z)," & " 145 (BC_1, memdata(31) , input, X)," & " 146 (BC_1, memdata(31) , output3, X, 130, 0, Z)," & " 147 (BC_1, memaddr( 2) , output3, X, 150, 0, Z)," & " 148 (BC_1, memaddr( 3) , output3, X, 150, 0, Z)," & " 149 (BC_1, memaddr( 4) , output3, X, 150, 0, Z)," & " 150 (BC_1, * , control, 0)," & -- maddr 2-7 " 151 (BC_1, memaddr( 5) , output3, X, 150, 0, Z)," & " 152 (BC_1, memaddr( 6) , output3, X, 150, 0, Z)," & " 153 (BC_1, memaddr( 7) , output3, X, 150, 0, Z)," & " 154 (BC_1, memaddr( 8) , output3, X, 160, 0, Z)," & " 155 (BC_1, memaddr( 9) , output3, X, 160, 0, Z)," & " 156 (BC_1, memaddr(10) , output3, X, 160, 0, Z)," & " 157 (BC_1, memaddr(11) , output3, X, 160, 0, Z)," & " 158 (BC_1, memaddr(12) , output3, X, 160, 0, Z)," & " 159 (BC_1, memaddr(13) , output3, X, 160, 0, Z)," & " 160 (BC_1, * , control, 0)," & -- maddr 8-15 " 161 (BC_1, memaddr(14) , output3, X, 160, 0, Z)," & " 162 (BC_1, memaddr(15) , output3, X, 160, 0, Z)," & " 163 (BC_1, memaddr(16) , output3, X, 164, 0, Z)," & " 164 (BC_1, * , control, 0)," & -- maddr 16-23 " 165 (BC_1, memaddr(17) , output3, X, 164, 0, Z)," & " 166 (BC_1, memaddr(18) , output3, X, 164, 0, Z)," & " 167 (BC_1, memaddr(19) , output3, X, 164, 0, Z)," & " 168 (BC_1, memaddr(20) , output3, X, 164, 0, Z)," & " 169 (BC_1, memaddr(21) , output3, X, 164, 0, Z)," & " 170 (BC_1, memaddr(22) , output3, X, 164, 0, Z)," & " 171 (BC_1, memaddr(23) , output3, X, 164, 0, Z)," & " 172 (BC_1, memaddr(24) , output3, X, 174, 0, Z)," & " 173 (BC_1, memaddr(25) , output3, X, 174, 0, Z)," & " 174 (BC_1, * , control, 0)," & -- maddr 24-31 " 175 (BC_1, memaddr(26) , output3, X, 174, 0, Z)," & " 176 (BC_1, memaddr(27) , output3, X, 174, 0, Z)," & " 177 (BC_1, memaddr(28) , output3, X, 174, 0, Z)," & " 178 (BC_1, memaddr(29) , output3, X, 174, 0, Z)," & " 179 (BC_1, memaddr(30) , output3, X, 174, 0, Z)," & " 180 (BC_1, memaddr(31) , output3, X, 174, 0, Z)"; end ST20450A;